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PIC16F18026/46 Full-Featured, 14/20-Pin Microcontrollers PIC16F18026/46
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PIC16F18026
PIC16F18046
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9
Memory Organization
9.2
Data Memory Organization
9.2.5
Common RAM
PIC16F18026/46
Introduction
PIC16F180
Family Summary
Core Features
1
Packages
2
Pin Diagrams
3
Pin Allocation Tables
4
Guidelines for Getting Started with
PIC16F180
Microcontrollers
5
Register and Bit Naming Conventions
6
Register Legend
7
Enhanced Mid-Range CPU
8
Device Configuration
9
Memory Organization
9.1
Program Memory Organization
9.2
Data Memory Organization
9.2.1
Bank Selection
9.2.2
Core Registers
9.2.3
Special Function Register
9.2.4
General Purpose RAM
9.2.5
Common RAM
9.2.6
Device Memory Maps
9.3
STATUS Register
9.4
PCL and PCLATH
9.5
Stack
9.6
Indirect Addressing
9.7
Register Definitions: Memory Organization
9.8
Register Summary - Memory Organization
10
Resets
11
OSC - Oscillator Module
12
INT - Interrupts
13
Sleep Mode
14
WDT - Watchdog Timer
15
NVM - Nonvolatile Memory Control
16
I/O Ports
17
IOC - Interrupt-on-Change
18
PPS - Peripheral Pin Select Module
19
TMR0 - Timer0 Module
20
TMR1 - Timer1 Module with Gate Control
21
TMR2 - Timer2 Module
22
NCO - Numerically Controlled Oscillator Module
23
CWG - Complementary Waveform Generator Module
24
CCP - Capture/Compare/PWM Module
25
Capture, Compare, and PWM Timers Selection
26
PWM - Pulse-Width Modulation
27
PWM Timers Selection
28
CLC - Configurable Logic Cell
29
MSSP - Host Synchronous Serial Port Module
30
EUSART - Enhanced Universal Synchronous Asynchronous Receiver Transmitter
31
ADC - Analog-to-Digital Converter with Computation Module
32
DAC - Digital-to-Analog Converter Module
33
CMP - Comparator Module
34
FVR - Fixed Voltage Reference
35
Temperature Indicator Module
36
ZCD - Zero-Cross Detection Module
37
Charge Pump
38
Instruction Set Summary
39
ICSP™ - In-Circuit Serial Programming™
40
Register Summary
41
Electrical Specifications
42
DC and AC Characteristics Graphs and Tables
43
Packaging Information
44
Appendix A: Revision History
Microchip Information
9.2.5 Common RAM
There are 16 bytes of common RAM accessible from all banks.
