1 Features

Even though a Signal Routing Port may seem similar to a regular I/O port, their operation and behavior are very different. Table 1-1 shows feature comparisons between a Signal Routing Port and a regular I/O port.

Table 1-1. Feature Comparison Between Signal Routing Port and Regular I/O Port
Feature	Signal Routing Port	Regular I/O Port
Port Nomenclature	PORTW	PORTx (x = A, B, C, …)
Pins per Port	Eight RWn signal routing port pins (n = 0 … 7)	Eight Rxn physical I/O pins (n = 0 … 7)
Software Read/Write	PORTW/LATW registers	PORTx/LATx registers
Data Direction	Supports virtual input (PORTWINx registers) and virtual output (PORTW register) simultaneously	TRISx register typically determines whether a pin reads a physical input or outputs to a physical pin
Other I/O Port Features	Features do not apply to Signal Routing Port since there is no external pin connection	Analog Select (ANSELx register) Weak Pull-ups (WPUx register) Open-Drain Control (ODCONx register) Slew Rate Control (SLRCONx register) Input Level Control (INLVLx register)
Other Signal Routing Port Features	Clock Selection and Control (PORTWCLK/PORTWCON registers) Data Flip Flop Control (PORTWDF register)	Features not available on regular I/O Port
Source of the Pin	LATW register Shifted signal routing port pin Physical I/O pin PPS input from a physical I/O pin⁽¹⁾ Outputs of various CIPs	TRISx Input mode: Physical I/O pin TRISx Output mode: LATx register or PPS output from other CIPs
Destination of the Pin	Input PPS for other CIPs PPS output to a physical I/O pin⁽¹⁾	TRISx Input mode: PORTx register and PPS input to other CIPs TRISx Output mode: Physical I/O pin
Peripheral Pin Select (PPS) Support	Yes	Yes
Interrupt-on-Change	IOCSR interrupt	IOC interrupt
DMA/ADC Triggers	IOCSR and Individual signal routing port pin outputs	IOC only
Note: PPS input and PPS output from/to physical pins is available on select devices only. Refer to the device data sheet for more information.