3.1.1.1 VPP-First Entry Mode

To enter Program/Verify mode via the VPP-First Entry mode, the following sequence must be followed:

  1. Hold ICSPCLK and ICSPDAT low.
  2. Raise the voltage on MCLR from 0V to VIHH.
  3. Raise the voltage on VDD from 0V to the desired operating voltage.

The VPP-First Entry mode prevents the device from executing code prior to entering the Program/Verify mode. For example, when the Configuration Byte has already been programmed to have MCLR disabled (MCLRE = 0), the Power-up Timer disabled (PWRTE = 0) and the internal oscillator selected, the device will execute the code immediately. VPP-First Entry mode is strongly recommended as it prevents the user code from executing. See the timing diagram in Figure 3-1.

Figure 3-1. Programming Entry and Exit Modes – VPP-First and Last