29.1.1.1 Enabling the Transmitter
The EUSART transmitter is enabled for asynchronous operations by configuring the following three control bits:
- The TXEN bit in the TXxSTA register is set to
‘
1
’ to enable the transmitter circuitry of the EUSART - The SYNC bit in the TXxSTA register is set to
‘
0
’ to configure the EUSART for asynchronous operation - The SPEN bit in the RCxSTA register is set to
‘
1
’ to enable the EUSART interface and to enable automatically the output drivers for RxyPPS selected as the TXx/CKx output
All other EUSART control bits are assumed to be in their default state.
If the TXx/CKx pin is shared with an analog peripheral, the analog I/O function must be disabled by clearing the corresponding ANSEL bit.
Important: The TXxIF Transmitter Interrupt flag in the PIR3
register is set when the TXEN enable bit in the PIE3 register is set and the Transmit Shift
Register (TSR) is Idle.