33.1.2 Channel Selection

The ADPCH register determines which channel is connected to the Sample-and-Hold circuit.

There are several channel selections available as shown in the following selection table:

Table 33-1. ADC Positive Input Channel Selections
ADPCH ADC Positive Channel Input
111111 Fixed Voltage Reference (FVR)(2)
111110 DAC1 output(1)
111101 Temperature Indicator(3)
111100 AVSS (Analog Ground)
100011 to 111000 Reserved. No channel connected.
110111RG7/ANG7
110110RG6/ANG6
110101RG5/ANG5
110100RG4/ANG4
110011RG3/ANG3
110010RG2/ANG2
110001RG1/ANG1
110000RG0/ANG0
101111Reserved. No channel connected
101110RF6/ANF6
101101RF5/ANF5
101100RF4/ANF4
101011Reserved. No channel connected
101010RF2/ANF2
101001RF1/ANF1
101000Reserved. No channel connected
100111RE7/ANE7
100110RE6/ANE6
100101RE5/ANE5
100100RE4/ANE4
100011RE3/ANE3
100010RE2/ANE2
100001RE1/ANE1
100000RE0/ANE0
011111RD7/AND7
011110RD6/AND6
011101RD5/AND5
011100RD4/AND4
011011RD3/AND3
011010RD2/AND2
011001RD1/AND1
011000RD0/AND0
010111 to 010000 Reserved. No channel connected
001111 RB7/ANB7
001110 RB6/ANB6
001101 RB5/ANB5
001100RB4/ ANB4
001011 RB3/ANB3
001010RB2/ ANB2
001001RB1/ ANB1
001000 RB0/ANB0
000111 RA7/ANA7
000110 RA6/ANA6
000101 RA5/ANA5
000100RA4/ ANA4
000011RA3/ ANA3
000010RA2/ ANA2
000001RA1/ ANA1
000000RA0/ANA0

When changing channels, a delay is required before starting the next conversion.

Refer to the “ADC Operation” section for more information.

Important: It is recommended to discharge the Sample-and-Hold capacitor when switching between ADC channels by starting a conversion on a channel connected to VSS and terminating the conversion after the acquisition time has elapsed. If the ADC does not have a dedicated VSS input channel, the VSS selection (DAC1R[4:0] = b'00000') through the DAC output channel can be used. If the DAC is in use, a free input channel can be connected to VSS, and can be used in place of the DAC.