The flowcharts shown in this section provide examples for read and
write operations. A polling or interrupt method can be used to check the status bits. The
interrupt method requires that the Interrupt Enable register (FLEX_TWI_IER) be configured
first.
Figure 9-102. TWI Write Operation with Single Data Byte without Internal
AddressFigure 9-103. TWI Write Operation with Single Data Byte and Internal
AddressFigure 9-104. TWI Write Operation with Multiple Data Bytes with or without
Internal AddressFigure 9-105. SMBus Write Operation with Multiple Data Bytes with or
without Internal Address and PEC SendingFigure 9-106. SMBus Write Operation with Multiple Data Bytes with PEC and
Alternative Command ModeFigure 9-107. TWI Write Operation with Multiple Data Bytes and Read
Operation with Multiple Data Bytes (Sr)Figure 9-108. TWI Write Operation with Multiple Data Bytes + Read Operation
and Alternative Command Mode + PECFigure 9-109. TWI Read Operation with Single Data Byte without Internal
AddressFigure 9-110. TWI Read Operation with Single Data Byte and Internal
AddressFigure 9-111. TWI Read Operation with Multiple Data Bytes with or without
Internal AddressFigure 9-112. TWI Read Operation with Multiple Data Bytes with or without
Internal Address with PECFigure 9-113. TWI Read Operation with Multiple Data Bytes with Alternative
Command Mode with PECFigure 9-114. TWI Read Operation with Multiple Data Bytes + Write Operation
with Multiple Data Bytes (Sr)Figure 9-115. TWI Read Operation with Multiple Data Bytes + Write with
Alternative Command Mode with PEC
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