5.2.6.18 ADC Temperature Sensor Mode Register
This register can only be written if the WPEN bit is cleared in the ADC Write Protection Mode Register.
| Name: | ADC_TEMPMR |
| Offset: | 0x44 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TEMPCMPMOD[1:0] | TEMPON | ||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bits 5:4 – TEMPCMPMOD[1:0] Temperature Comparison Mode
| Value | Name | Description |
|---|---|---|
| 0 | LOW |
Generates the TEMPCHG flag in ADC_ISR when the converted data is lower than the low threshold of the window. |
| 1 | HIGH |
Generates the TEMPCHG flag in ADC_ISR when the converted data is higher than the high threshold of the window. |
| 2 | IN |
Generates the TEMPCHG flag in ADC_ISR when the converted data is in the comparison window. |
| 3 | OUT |
Generates the TEMPCHG flag in ADC_ISR when the converted data is out of the comparison window. |
Bit 0 – TEMPON Temperature Sensor On
Warning: To put the system in Low-Power mode when the
temperature sensor is in use, TEMPON must be cleared and a software reset must be
performed (ADC_CR.SWRST=1).
| Value | Description |
|---|---|
| 0 |
Disables the temperature sensor. |
| 1 |
Enables the temperature sensor and the measurements are performed as soon as a trigger event occurs. |