10.5.2 Control B
| Name: | CTRLB |
| Offset: | 0x01 |
| Reset: | 0x30 |
| Property: | Configuration Change Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FLMAPLOCK | FLMAP[1:0] | APPDATAWP | BOOTRP | APPCODEWP | |||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 1 | 1 | 0 | 0 | 0 | |||
Bit 7 – FLMAPLOCK Flash Mapping Lock
Setting this bit to ‘1’ prevents further updates of
FLMAP[1:0]. This bit can only be cleared by a Reset.
Bits 5:4 – FLMAP[1:0] Flash Section Mapped into Data Space
Select what part (in blocks of 32 KB) of the Flash will be mapped as
part of the CPU data space and will be accessible through LD/ST
instructions.
This bit field is not under Configuration Change Protection.
| Value | Name | Mapped Flash Section [KB] | ||
|---|---|---|---|---|
| 32 KB Flash | 64 KB Flash | 128 KB Flash | ||
0x00 | SECTION0 | 0-32 | 0-32 | 0-32 |
0x01 | SECTION1 | 32-64 | 32-64 | |
0x02 | SECTION2 | 0-32 | 64-96 | |
0x03 | SECTION3 | 32-64 | 96-12 | |
Bit 2 – APPDATAWP Application Data Section Write Protection
Writing this bit to ‘1’ prevents further updates to
the Application Data section. This bit can only be cleared by a Reset.
Bit 1 – BOOTRP Boot Section Read Protection
Writing this bit to ‘1’ will protect the BOOT
section from reading and instruction fetching. If a read is issued from the
other Flash sections, it will return ‘0’. An instruction fetch
from the BOOT section will return a NOP instruction. This bit
can only be written from the BOOT section, and it can only be cleared by a
Reset. The read protection will only take effect when leaving the BOOT section
after the bit is written.
Bit 0 – APPCODEWP Application Code Section Write Protection
Writing this bit to ‘1’ prevents further updates to
the Application Code section. This bit can only be cleared by a Reset.