28.3.1 Initialization
The following bits are enable-protected,
meaning that they can only be written when the corresponding even LUT is disabled (ENABLE =
‘0’ in CCL.LUT0CTRLA):
- Sequential Selection (SEQSEL) in Sequential Control 0 (CCL.SEQCTRL0) register
The following registers are
enable-protected, meaning that they can only be written when the corresponding LUT is
disabled (ENABLE = ‘0’ in CCL.LUT0CTRLA):
- LUT n Control x (CCL.LUTnCTRLx) register, except the ENABLE bit
Enable-protected bits in the CCL.LUTnCTRLx
registers can be written at the same time as the ENABLE bit in CCL.LUTnCTRLx is written to
‘1’, but not at the same time as the ENABLE bit is written to
‘0’.
The enable-protection is denoted by the enable-protected property in the register description.