22.5.4 Control D

Name: CTRLD
Offset: 0x03
Reset: 0x00
Property: -

Bit 76543210 
 CMPBVAL[3:0]CMPAVAL[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 0:3, 4:7 – CMPVAL Compare x Value (in Active state)

These bits set the logical value of the PWMx signal for the corresponding states in the TCD cycle.

These settings are valid only if the Compare Output Value Override (CMPOVR) bit in the Control C (TCDn.CTRLC) register is written to ‘1’.

Table 22-12. Two and Four Ramp Mode
CMPxVAL DTA OTA DTB OTB
PWMA CMPAVAL[0] CMPAVAL[1] CMPAVAL[2] CMPAVAL[3]
PWMB CMPBVAL[0] CMPBVAL[1] CMPBVAL[2] CMPBVAL[3]

When used in One Ramp mode, WOA will only use the setup for dead time A (DTA) and on time A (OTA) to set the output. WOB will only use dead time B (DTB) and on time B (OTB) values to set the output.

Table 22-13. One Ramp Mode
CMPxVAL DTA OTA DTB OTB
PWMA CMPAVAL[1] CMPAVAL[0] - -
PWMB - - CMPBVAL[3] CMPBVAL[2]