8.1 Current Address Read within the EEPROM

The internal Address Pointer must be pointing to a memory location within the EEPROM in order to perform a current address read from the EEPROM. To initiate the operation, the host must send a Start condition, followed by the device address byte with the opcode of 1010b (Ah) specified, along with the appropriate client address combination and the Read/Write bit set to a logic ‘1’. After the device address byte has been sent, the AT21CS01/AT21CS11 will return an ACK (logic ‘0’).

Following the ACK, the device is ready to output one byte (eight bits) of data. The host initiates all bits of data by driving the SI/O line low to start. The AT21CS01/AT21CS11 will hold the line low after the host releases it to indicate a logic ‘0’. If the data is logic ‘1’, the AT21CS01/AT21CS11 will not hold the SI/O line low at all, causing it to be pulled high by the pull-up resistor once the host releases it. This sequence repeats for eight bits.

After the host has read the first data byte and no further data is desired, the host must return a NACK (logic ‘1’) response to end the read operation and return the device to the Standby mode. Figure 8-1 depicts this sequence.

If the host would like the subsequent byte, it would return an ACK (logic ‘0’) and the device will be ready to output the next byte in the memory array. Refer to Sequential Read within the EEPROM for details about continuing to read beyond one byte.

Note: If the last operation to the device was an access to the Security register, then a random read should be performed to ensure that the Address Pointer is set to a known memory location within the EEPROM.

Figure 8-1. Current Address Read