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32-bit Connectivity MCU with Integrated Security PIC32CZ CA80/CA90 Family
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PIC32CZ2051CA80100
PIC32CZ2051CA80144
PIC32CZ2051CA80176
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PIC32CZ2051CA90144
PIC32CZ2051CA90176
PIC32CZ2051CA90208
PIC32CZ4010CA80100
PIC32CZ4010CA80144
PIC32CZ4010CA80176
PIC32CZ4010CA80208
PIC32CZ4010CA90100
PIC32CZ4010CA90144
PIC32CZ4010CA90176
PIC32CZ8110CA80100
PIC32CZ8110CA80144
PIC32CZ8110CA80176
PIC32CZ8110CA80208
PIC32CZ8110CA90100
PIC32CZ8110CA90144
PIC32CZ8110CA90176
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35
Serial Communication Interface (SERCOM)
35.6
Synchronous and Asynchronous Receiver and Transmitter (SERCOM USART)
35.6.7
SERCOM USART Functional Description
PIC32CZ CA80/CA90 Family
Up to 8 MB Flash, 1 MB SRAM, Hardware Security Module, Secure Boot, Floating Point Unit (FPU), Advanced Analog, Gigabit Ethernet, HS USB, CAN FD, and Peripheral Touch Controller (PTC)
1
Configuration Summary
2
Guidelines for Getting Started
3
Ordering Information
4
Block Diagram
5
Pinout
6
Signal Description
7
Power Supplies and Startup Considerations
8
Product Mapping
9
Peripherals
10
Processor and Architecture
11
Memories
12
Hardware Security Module (HSM)
13
Multi-Channel RAM Controller (MCRAMC)
14
Tightly Coupled Memory with ECC (TCM)
15
Peripheral Access Controller (PAC)
16
Device Service Unit (DSU)
17
Clock Distribution System
18
Oscillator Controller (OSCCTRL)
19
32 KHz Oscillators Controller (OSC32KCTRL)
20
Generic Clock Controller (GCLK)
21
Main Clock (MCLK)
22
Watchdog Timer (WDT)
23
Frequency Meter (FREQM)
24
Real-Time Counter (RTC)
25
Direct Memory Access Controller (DMAC)
26
Supply Controller (SUPC)
27
Power Manager (PM)
28
Reset Controller (RSTC)
29
External Interrupt Controller (EIC)
30
MLB Media Local Bus (MLB)
31
Non-Volatile Memory Controller (NVMCTRL)
32
Gigabit Ethernet Media Access Controller (GMAC / ETH)
33
Event System (EVSYS)
34
I/O Pin Controller (PORT)
35
Serial Communication Interface (SERCOM)
35.1
Overview
35.2
Features
35.3
Block Diagram
35.4
Peripheral Dependencies
35.5
Functional Description
35.6
Synchronous and Asynchronous Receiver and Transmitter (SERCOM USART)
35.6.1
USART Overview
35.6.2
USART Features
35.6.3
USART Signal Descriptions
35.6.4
SERCOM USART Synchronous Mode
35.6.5
SERCOM USART Asynchronous Mode Block Diagram
35.6.6
SERCOM USART Peripheral Dependencies
35.6.7
SERCOM USART Functional Description
35.6.7.1
Principles of Operation
35.6.7.2
SERCOM USART Basic Operation
35.6.7.3
SERCOM USART Additional Features
35.6.7.4
SERCOM USART Hardware Handshaking
35.6.7.5
SERCOM USART IrDA Modulation and Demodulation
35.6.7.6
SERCOM USART Break Character Detection and Auto-Baud/LIN Client
35.6.7.7
SERCOM USART LIN Host
35.6.7.8
RS485 Configuration
35.6.7.9
ISO 7816 for Smart Card Interfacing
35.6.7.10
DMA, Interrupts, and Events
35.6.7.11
Sleep Mode Operation
35.6.7.12
Synchronization
35.6.8
USART Register Summary
35.7
SERCOM Serial Peripheral Interface (SPI)
35.8
SERCOM I
2
C
36
Serial Quad Interface (SQI)
37
Hi-Speed Universal Serial Bus (USB)
38
Controller Area Network (CAN)
39
External Bus Interface (EBI)
40
SD/MMC Host Controller (SDHC)
41
True Random Number Generator (TRNG)
42
Analog-to-Digital Converter (ADC)
43
Analog Comparators (AC)
44
Timer/Counter for Control Applications (TCC)
45
TrustRAM (TRAM)
46
Peripheral Touch Controller (PTC)
47
SPI/I
2
S/I
8
S Controller
48
Electrical Characteristics
49
Packaging Information
50
Schematic Checklist
51
Common Conventions
52
Acronyms and Abbreviations
53
Revision History
Microchip Information
35.6.7 SERCOM USART Functional Description