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PIC32CM16/32 GV00 Family Data Sheet
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15
WDT – Watchdog Timer
15.5
Peripheral Dependencies
15.5.6
Debug Operation
Low-Power, 32-bit Cortex-M0+ MCUs with 12-bit ADC, 256-Channel PTC, RTC, and SERCOM
1
Configuration Summary
2
Ordering Information
(1)
3
Block Diagram
4
Pinout and Packaging
5
Signal Description
6
Power Supply and Start-Up Considerations
7
Product Mapping
8
Processor And Architecture
9
Peripheral Dependencies
10
Device Service Unit (DSU)
11
Clock System
12
GCLK - Generic Clock Controller
13
PM - Power Manager
14
SYSCTRL – System Controller
15
WDT – Watchdog Timer
15.1
Overview
15.2
Features
15.3
Block Diagram
15.4
Signal Description
15.5
Peripheral Dependencies
15.5.1
I/O Lines
15.5.2
Power Management
15.5.3
Clocks
15.5.4
Interrupts
15.5.5
Events
15.5.6
Debug Operation
15.5.7
Register Access Protection
15.5.8
Analog Connections
15.6
Functional Description
15.7
Register Summary
16
RTC – Real-Time Counter
17
EIC – External Interrupt Controller
18
Nonvolatile Memory Controller (NVMCTRL)
19
PORT - I/O Pin Controller
20
Event System (EVSYS)
21
SERCOM – Serial Communication Interface
22
SERCOM USART - SERCOM Synchronous and Asynchronous Receiver and Transmitter
23
Register Summary
24
SERCOM SPI – SERCOM Serial Peripheral Interface
25
SERCOM I
2
C – Inter-Integrated Circuit
26
Timer/Counter (TC)
27
ADC - Analog-to-Digital Converter
28
AC – Analog Comparators
29
DAC – Digital-to-Analog Converter
30
PTC - Peripheral Touch Controller
31
Electrical Specifications 85°C
32
Electrical Specifications 125°C
33
Packaging Information
34
Schematic Checklist
35
Revision History
36
Conventions
37
Acronyms and Abbreviations
38
Product Identification System
Microchip Information
15.5.6 Debug Operation
When the CPU is halted in Debug mode the WDT will halt normal operation.
