26.8.13 Channel x Compare/Capture Value,
16-bit Mode
Table 26-36. Register Bit Attribute Legend
Symbol
Description
Symbol
Description
Symbol
Description
R
Readable bit
HC
Cleared by Hardware
(Grey cell)
Unimplemented
W
Writable bit
HS
Set by Hardware
X
Bit is unknown at Reset
K
Write to clear
S
Software settable bit
—
—
Name:
CCx
Offset:
0x18 + x*0x02 [x=0..1]
Reset:
0x0000
Property:
Write-Synchronized
Bit
15
14
13
12
11
10
9
8
CC[15:8]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
CC[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 15:0 – CC[15:0] Channel x Compare/Capture Value
These bits contain the
compare/capture value in 16-bit TC mode. In Match frequency (MFRQ) or Match PWM (MPWM)
waveform operation (CTRLA.WAVEGEN), the CC0 register is used as a period
register.
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