1.1 External Interrupt Vectors
The Atmel megaAVR supports several interrupt sources out of which external interrupts are significant. The external interrupts can be triggered using two sets of pins. INTn pins (ordinary external interrupt pins) and PCINTn pins (pin change external interrupt pins). The ‘n’ varies from device to device and signifies the number like INT0. Refer to the respective device datasheet for the specific values of n.
- INT7:0 Pins (with various input sense configurations)
- Pin change interrupts pins (PCINT23:0)
For each interrupt source, there is an interrupt vector to which the program execution control jumps, to execute the corresponding service routine. The interrupt vectors for external interrupts on ATmega2560 are shown in the following table. For device specific interrupt vectors, refer to the respective datasheet.
| Vector no. | Program address | Source | Port pins in ATmega2560 | Interrupt definitions |
|---|---|---|---|---|
| 1 | $0000 | RESET | RESET |
External Pin, Power-on Reset, Brown-out Reset, Watchdog Reset, and JTAG AVR Reset |
| 2 | $0002 | INT0 | PD0 | External Interrupt Request 0 |
| 3 | $0004 | INT1 | PD1 | External Interrupt Request 1 |
| 4 | $0006 | INT2 | PD2 | External Interrupt Request 2 |
| 5 | $0008 | INT3 | PD3 | External Interrupt Request 3 |
| 6 | $000A | INT4 | PE4 | External Interrupt Request 4 |
| 7 | $000C | INT5 | PE5 | External Interrupt Request 5 |
| 8 | $000E | INT6 | PE6 | External Interrupt Request 6 |
| 9 | $0010 | INT7 | PE7 | External Interrupt Request 7 |
| 10 | $0012 | PCINT0 | PCINT0:7 – PB0:7 | Pin Change Interrupt Request 0 |
| 11 | $0014 | PCINT1 |
PCINT8 – PE0 PCINT9:15 – PJ0:PJ6 | Pin Change Interrupt Request 1 |
| 12 | $0016 | PCINT2 | PCINT16:23 – PK0:7 | Pin Change Interrupt Request 2 |
The eight external interrupt sources (INT7:0) have dedicated interrupt vectors where a group of pin change interrupts share the same interrupt vector as listed in Table 1-1.
Any signal level change in any of the eight pins PCINT0:7 (if enabled) will trigger the interrupt PCINT0. This means that, if an interrupt is triggered by either the pin PCINT0 or PCINT4, the CPU will jump to the same vector address $0012. Similarly, any signal level change in any of the eight pins PCINT8:15 (if enabled) will trigger the interrupt PCINT1 and any signal level change in any of the eight pins PCINT16:23 (if enabled) will trigger the interrupt PCINT2.
For pin change interrupt each of PCINT0 to PCINT7 is OR'ed together and synchronized. It is up to the application code to solve the handling by keeping track of previous pin values and then in the interrupt routine scan the present pin values to check which pin has changed. The same is applicable for PCINT8:15 and PCINT16:23.