18.4.1 PMD0

PMD Control Register 0
Note:
  1. Clearing the SYSCMD bit disables the system clock (FOSC) to peripherals, however peripherals clocked by FOSC/4 are not affected.
Name: PMD0
Address: 0x063

Bit 76543210 
 SYSCMDFVRMDHLVDMDCRCMDSCANMD CLKRMDIOCMD 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bit 7 – SYSCMD  Disable Peripheral System Clock Network(1)

ValueDescription
1 System clock network disabled (FOSC)
0 System clock network enabled

Bit 6 – FVRMD Disable Fixed Voltage Reference

Disable Fixed Voltage Reference
ValueDescription
1 FVR module disabled
0 FVR module enabled

Bit 5 – HLVDMD Disable High/Low-Voltage Detect

ValueDescription
1 HLVD module disabled
0 HLVD module enabled

Bit 4 – CRCMD Disable CRC Module

ValueDescription
1 CRC module disabled
0 CRC module enabled

Bit 3 – SCANMD Disable NVM Memory Scanner

ValueDescription
1 NVM memory scanner module disabled
0 NVM memory scanner module enabled

Bit 1 – CLKRMD Disable Clock Reference

ValueDescription
1 Clock reference module disabled
0 Clock reference module enabled

Bit 0 – IOCMD Disable Interrupt-on-Change

ValueDescription
1 Interrupt-on-change module is disabled
0 Interrupt-on-change module is enabled
Clearing the SYSCMD bit disables the system clock (FOSC) to peripherals, however peripherals clocked by FOSC/4 are not affected.