24.10.6 TxRST

Name:	TxRST
Offset:	0x0391,0x0397,0x039D

Timer External Reset Signal Selection Register


Bit	7	6	5	4	3	2	1	0
				RSEL[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0

Bits 4:0 – RSEL[4:0] External Reset Source Selection

Table 24-4. External Reset Sources
RSEL	Reset Source
RSEL	TMR2	TMR4	TMR6
`11111-10101`	Reserved
`10100`	CLC4_OUT
`10011`	CLC3_OUT
`10010`	CLC2_OUT
`10001`	CLC1_OUT
`10000`	ZCD_OUT
`01111`	C2_OUT
`01110`	C1_OUT
`01101`	PWM4S1P2_OUT
`01100`	PWM4S1P1_OUT
`01011`	PWM3S1P2_OUT
`01010`	PWM3S1P1_OUT
`01001`	PWM2S1P2_OUT
`01000`	PWM2S1P1_OUT
`00111`	PWM1S1P2_OUT
`00110`	PWM1S1P1_OUT
`00101`	CCP2_OUT
`00100`	CCP1_OUT
`00011`	TMR6_Postscaled_OUT		Reserved
`00010`	TMR4_Postscaled_OUT	Reserved	TMR4_Postscaled_OUT
`00001`	Reserved	TMR2_Postscaled_OUT
`00000`	Pin selected by T2INPPS	Pin selected by T4INPPS	Pin selected by T6INPPS

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