Enable the ADC GCLK with the appropriate source
clock and dividers to reach the required sampling frequency.
Set ADC_TEMPMR.TEMPON and wait for the specified
start-up time.
Set ADC_MR.STARTUP to SUT512.
Set ADC_MR.TRACKTIM to 6 and ADC_EMR.TRACKX to
1.
Clear ADC_CCR.DIFF15.
Set ADC_TRGR.TRGMOD to the appropriate value.
Set ADC_EMR.OSR to OSR256.
Set ADC_EMR.ADCMODE to NORMAL.
Set ADC_EMR.SIGNMODE to SE_UNSG_DF_SIGN.
Set the single-ended measurement on VBG channel
31: ADC_ACR.SRCLCH = 1.
Set the single-ended measurement on
VTEMP channel 31: ADC_ACR.SRCLCH = 0.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
