31.1.2 Channel Selection
The ADPCH31.7.8 ADPCH register determines which channel is connected to the Sample-and-Hold circuit.
There are several channel selections available as shown in the following selection table:
| ADPCH | ADC Positive Channel Input |
|---|---|
| 111111 | Fixed Voltage Reference (FVR) |
| 111110 | DAC1 output |
| 111101 | Temperature Indicator |
| 111100 | AVSS (Analog Ground) |
| 011000-111011 | Reserved. No channel connected. |
| 010111 | RC7/ANC7 |
| 010110 | RC6/ANC6 |
| 010101 | RC5/ ANC5 |
| 010100 | RC4/ ANC4 |
| 010011 | RC3/ANC3 |
| 010010 | RC2/ANC2 |
| 010001 | RC1/ ANC1 |
| 010000 | RC0/ANC0 |
| 001111 | RB7/ANB7 |
| 001110 | RB6/ANB6 |
| 001101 | RB5/ANB5 |
| 001100 | RB4/ ANB4 |
| 001011 | RB3/ANB3 |
| 001010 | RB2/ ANB2 |
| 001001 | RB1/ ANB1 |
| 001000 | RB0/ANB0 |
| 000111 | RA7/ANA7 |
| 000110 | RA6/ANA6 |
| 000101 | RA5/ANA5 |
| 000100 | RA4/ ANA4 |
| 000011 | RA3/ ANA3 |
| 000010 | RA2/ ANA2 |
| 000001 | RA1/ ANA1 |
| 000000 | RA0/ANA0 |
When changing channels, a delay is required before starting the next conversion.
Refer to Section “ADC Operation” for more information.
Important: It is recommended to discharge the
Sample-and-Hold capacitor when switching between ADC channels by starting a conversion on a
channel connected to VSS and terminating the conversion after the acquisition
time has elapsed. If the ADC does not have a dedicated VSS input channel, the
VSS selection (DAC1R[4:0] = b'00000') through the DAC output channel can be
used. If the DAC is in use, a free input channel can be connected to VSS, and
can be used in place of the DAC.