11.2 Memory Addressing

The DSC devices use a modified Harvard architecture with separate data and program memory spaces. Data memory is both byte-oriented (8 bits wide) and word-oriented (16 bits wide). Bytes are assigned sequential addresses, starting with 0, 1, 2, 3 and so on. Words are assigned sequential even addresses, starting with 0, 2, 4, 6 and so on.

On the dsPIC33A architecture, program memory is long word oriented, where each instruction word is 32 bits wide. This architecture has a unified memory address structure, so that nothing special is needed to access data stored in program memory. The remainder of this sub-chapter is therefore not relevant for dsPIC33A devices.

On dsPIC33C/E/F architectures, program memory is word-oriented, where each instruction word is 24 bits wide. Instruction words are assigned sequential even addresses, starting with 0, 2, 4, 6 and so on. The PC indicates the next instruction to be executed, and increments by 2 for each instruction word. Individual bytes in a program memory word are not addressable.

While a traditional Harvard architecture does not permit access to data stored in program memory, the DSC architecture provides three ways to accomplish this task, discussed in the following sections.