3.7.2 Embedded Characteristics

  • Numerous Configurations Supported
    • 2K, 4K, 8K row address memory parts
    • SDRAM with two or four internal banks
    • SDRAM with 16-bit and 32-bit data path
  • Programming Facilities
    • Word, half-word, byte access
    • Automatic Page break when memory boundary has been reached
    • Multibank ping-pong access
    • Timing parameters specified by software
    • Automatic refresh operation, refresh rate is programmable
    • Automatic update of DS, TCR and PASR parameters (mobile SDRAM devices)
  • Energy-Saving Capabilities
    • Self-refresh, Powerdown and Deep Power modes Supported
    • Supports mobile SDRAM devices
  • Error Detection
    • Refresh error interrupt
  • SDRAM Power-up Initialization by Software
  • CAS Latency of 2, 3 Supported
  • Auto Precharge Command Not Used
  • 256-Mbyte address space with 32-bit data path, 128-Mbyte address space with 16-bit data path
  • Zero Wait State Scrambling/Unscrambling Function with User Key
  • Multiplexed Address/Data Lines or Address/Data/Command Lines for Reduced Pin Count
  • Abnormal Software Access and Internal Sequencer Integrity Check Reports