4.12.2 Embedded Characteristics

  • ICE Access Prevention
  • Debug Communication Channel (DCC) Support
  • Chip ID Registers
  • Two-pin UART
    • Independent receiver and transmitter with a common programmable baud rate generator
    • Baud rate can be driven by processor-independent generic source clock
    • Even, odd, mark or space parity generation
    • Parity, framing and overrun error detection
    • Automatic Echo, Local loopback and Remote Loopback Channel modes
    • Digital filter on receive line
    • Interrupt generation
    • Support for two DMA channels with connection to receiver and transmitter
    • Receiver timeout
    • Register write protection