36.7.1 SPIxCON0

Note:
  1. Do not change this bit when EN = 1.
SPI Control Register 0
Name: SPIxCON0
Address: 0x084,0x091

Bit 76543210 
 EN    LSBFMSTBMODE 
Access R/WR/WR/WR/W 
Reset 0000 

Bit 7 – EN SPI Enable

ValueDescription
1 SPI is enabled
0 SPI is disabled

Bit 2 – LSBF  LSb-First Data Exchange Select(1)

ValueDescription
1 Data are exchanged LSb first
0 Data are exchanged MSb first (traditional SPI operation)

Bit 1 – MST  SPI Host Operating Mode Select(1)

ValueDescription
1 SPI module operates as the bus host
0 SPI module operates as a bus client

Bit 0 – BMODE  Bit-Length Mode Select(1)

ValueDescription
1 SPIxTWIDTH setting applies to every byte: total bits sent is SPIxTWIDTH*SPIxTCNT, end-of-packet occurs when SPIxTCNT = 0
0 SPIxTWIDTH setting applies only to the last byte exchanged; total bits sent is SPIxTWIDTH + (SPIxTCNT*8)
Do not change this bit when EN = 1.