Features

  • AVR® CPU
    • Running at up to 20 MHz
    • Single-cycle I/O register access
    • Two-level interrupt controller
    • Two-cycle hardware multiplier
    • Program and Debug Interface Disable (PDID)
    • Supply voltage range: 1.8-5.5V
  • Memories
    • 32 KB In-system-programmable Flash memory with a true read-while-write operation
    • 3 KB SRAM
    • 512B EEPROM
    • 64B of user row in nonvolatile memory that can keep data during chip-erase and be programmed while the device is locked
    • Write/erase endurance
      • Flash: 10,000 cycles
      • EEPROM: 100,000 cycles
    • Data retention: 40 Years at 55°C
  • System
    • Power-on Reset (POR) circuit
    • Brown-out Detector (BOD) with user-programmable levels
    • Voltage Level Monitor (VLM) with interrupt at a programmable level above the BOD level
    • Clock options:
      • High-precision internal oscillator with selectable frequency up to 20 MHz (OSCHF)
        • Auto-tuning for improved internal oscillator accuracy
      • Internal PLL up to 80 MHz for high-frequency operation of Timer/Counter type E/F
      • Internal ultra-low power 32.768 kHz oscillator (OSC32K)
      • External 32.768 kHz crystal oscillator (XOSC32K)
      • External clock input
    • Single-pin Unified Program and Debug Interface (UPDI)
    • Three sleep modes
      • Idle with all peripherals running for immediate wake-up
      • Standby with a configurable operation of selected peripherals
      • Power-Down with full data retention
  • Peripherals
    • Two 16-bit Timer/Counters type B (TCB) with input capture for capture and signal measurements
    • One 16-bit Timer/Counter type E (TCE) with four compare channels for PWM generation and Waveform Extension (WEX)
    • One 24-bit Timer/Counter type F (TCF) for frequency generation
    • One 16-bit Real-Time Counter (RTC) that can run from an external crystal or internal oscillator
    • One USART with fractional baud rate generator, auto-baud, and start-of-frame detection
    • One host/client Serial Peripheral Interface (SPI)
    • One Two-Wire Interface (TWI) with dual address match
      • Independent host and client operation (Dual mode)
      • Phillips I2C compatible
      • Standard mode (Sm, 100 kHz)
      • Fast mode (Fm, 400 kHz)
      • Fast mode plus (Fm+, 1 MHz)
    • Event System for CPU-independent and predictable inter-peripheral signaling
    • Configurable Custom Logic (CCL) with up to four programmable Look-up Tables (LUTs)
    • One 12-bit, 300 ksps, differential Analog-to-Digital Converter (ADC) with a programmable gain amplifier (PGA)
    • Two Analog Comparators (ACs) with window compare functions
    • Multiple voltage references (VREF)
      • 1.024V
      • 2.048V
      • 2.500V
      • 4.096V
      • VREFA
      • VDD
    • Automated Cyclic Redundancy Check (CRC) Flash program memory scan
    • Watchdog Timer (WDT) with Window mode and separate on-chip oscillator
    • External interrupt on all general purpose pins
  • I/O and Packages:
    • Up to 28/27 programmable I/O pins
    • 14-pin SOIC and TSSOP
    • 20-pin SSOP
    • 28-pin SPDIP, SSOP and VQFN
    • 32-pin VQFN and TQFP
  • Temperature Ranges
    • Industrial: -40°C to 85°C ambient
    • Extended: -40°C to 125°C ambient