6.1 Interconnection between SAM L21 and Transceiver within ATSAMR34J18B SiP

This section describes the transceiver to microcontroller interface. The interface is comprised of a slave SPI and additional control signals. This interface is connected to a SAM L21 master interface as shown below. The SERCOM4 and GPIO signals dedicated to the CPU-TRX interface are not externally exposed and may not be used for any other purposes.

Figure 6-1. Microcontroller to Transceiver Interface

The SPI is used for register, Frame Buffer and SRAM access. The additional control signals are connected to the GPIO/IRQ interface of the microcontroller. The table below introduces the radio transceiver I/O signals and their functionalities.

Table 6-1. Microcontroller Interface Signal Description

TRX Signal

CPU Signal Name

Description

/SEL

PB31

SPI select signal, active-low

MOSI

PB30

SPI data (master output slave input) signal

MISO

PC19

SPI data (master input slave output) signal

SCLK

PC18

SPI clock signal

nRST

PB15

Transceiver Reset signal, active-low

DIO0PB16Digital I/O, software-configured
DIO1PA11Digital I/O, software-configured
DIO2PA12Digital I/O, software-configured
DIO3PB17Digital I/O, software-configured
DIO4PA10Digital I/O, software-configured
DIO5PB00Digital I/O, software-configured