23.5.12 Delay Control
| Name: | DLYCTRL |
| Offset: | 0x14 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DLYPRESC[1:0] | DLYTRIG[1:0] | DLYSEL[1:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bits 5:4 – DLYPRESC[1:0] Delay Prescaler
These bits control the prescaler settings for the blanking or output event delay.
| Value | Description |
|---|---|
| 0x0 | Prescaler division factor 1 |
| 0x1 | Prescaler division factor 2 |
| 0x2 | Prescaler division factor 4 |
| 0x3 | Prescaler division factor 8 |
Bits 3:2 – DLYTRIG[1:0] Delay Trigger
These bits control what should trigger the blanking or output event delay.
| Value | Name | Description |
|---|---|---|
| 0x0 | CMPASET | CMPASET triggers delay |
| 0x1 | CMPACLR | CMPACLR triggers delay |
| 0x2 | CMPBSET | CMPBSET triggers delay |
| 0x3 | CMPBCLR | CMPASET triggers delay (end of cycle) |
Bits 1:0 – DLYSEL[1:0] Delay Select
These bits control what function should be used by the delay trigger the blanking or output event delay.
| Value | Description |
|---|---|
| 0x0 | Delay functionality not used |
| 0x1 | Input blanking enabled |
| 0x2 | Event delay enabled |
| 0x3 | Reserved |