27.5.1 Control A

Name: CTRLA
Offset: 0x00
Reset: 0x00
Property: -

Bit 76543210 
    SDASETUPSDAHOLD[1:0]FMPEN  
Access R/WR/WR/WR/W 
Reset 0000 

Bit 4 – SDASETUP  SDA Setup Time

By default, there are four clock cycles of setup time on SDA out signal while reading from the slave part of the TWI module. Writing this bit to '1' will change the setup time to eight clocks.

ValueNameDescription
04CYCSDA setup time is four clock cycles
18CYCSDA setup time is eight clock cycle

Bits 3:2 – SDAHOLD[1:0]  SDA Hold Time

Writing these bits selects the SDA hold time.

Table 27-3. SDA Hold Time
SDAHOLD[1:0]Nominal Hold TimeHold Time Range Across All Corners (ns)Description
0x0OFF0Hold time off.
0x150 ns36 - 131Backward compatible setting.
0x2300 ns180 - 630Meets SMBus specification under typical conditions.
0x3500 ns300 - 1050Meets SMBus specification across all corners.

Bit 1 – FMPEN  FM Plus Enable

Writing these bits selects the 1 MHz bus speed (Fast mode plus, Fm+) for the TWI in default configuration.

ValueDescription
0Fm+ disabled
1Fm+ enabled