The Slave Data register I/O location (DATA) provides direct access to
the slave's physical Shift register, which is used both to shift data out onto
the bus (transmit) and to shift in data received from the bus (receive). The
direct access implies that the Data register cannot be accessed during byte
transmissions. Built-in logic prevents any write accesses to the Data register
during the shift operations. Reading valid data or writing data to be
transmitted can only be successfully done when the bus clock (SCL) is held low
by the slave (i.e., when the slave CLKHOLD bit is set). However, it is not
necessary to check the CLKHOLD bit in software before accessing the slave DATA
register if the software keeps track of the present protocol state by using
interrupts or observing the interrupt flags. Accessing the slave DATA register,
assumed that clock hold is active, auto-trigger bus operations dependent of the
state of the Slave Acknowledge Action Command bits (ACKACT) and type of register
access (read or write).
