25.3.2.1.1 Internal Clock Generation - The Fractional Baud Rate Generator

The Baud Rate Generator is used for internal clock generation for Asynchronous modes, Synchronous master mode, and Master SPI mode operation. The output frequency generated (f_BAUD) is determined by the baud register value (BAUD) and the peripheral clock frequency (f_{CLK_PER}).

In Asynchronous mode, the BAUD register value uses all 16 bits. The 10 MSBs (BAUD[15:6]) hold the integer part, while the 6 LSBs (BAUD[5:0]) hold the fractional part. Non standard BAUD frequencies can result in fractional parts, which if ignored introduce an error in the approximation to the desired BAUD frequency. The BAUD fractional part is used to reduce this error by adjusting the sampling point. BAUD register values below 64 are not supported, as the integer part need to be at least 1. The integer part valid range is therefore 64 to 65535.

In Synchronous mode, only the 10-bit integer part of the BAUD register, i.e. BAUD[15:6], determine the baud rate, and the fractional part must therefore be written to zero.

The following table lists equations for translating between BAUD register values and baud rates. The equations takes BAUD register bit width and fractional interpretation into consideration, and the BAUD register values calculated with these equations can be written directly to the BAUD register without any additional scaling. Resulting rounding errors will contribute to baud rate frequency errors.

S = 16 if in Receiver mode (USART.CTRLB, RXMODE) is configured as NORMAL, and S = 8 if configured as CLK2X. S determines the number of samples taken for each USART symbol.