38.4.8 Analog-to-Digital Converter (ADC) Conversion Timing Specifications

Table 38-14. 
Standard Operating Conditions (unless otherwise stated)
Param No.Sym.CharacteristicMin.Typ. †Max.UnitsConditions
AD20TADADC Clock Period1—9μsUsing FOSC as the ADC clock source ADOCS = 0
AD21—2—μsUsing FRC as the ADC clock source ADOCS = 1
AD22TCNVConversion Time(1) —11+3TCY—TADSet of GO/DONE bit to Clear of GO/ DONE bit
AD23TACQAcquisition Time—2—μs
AD24THCDSample and Hold Capacitor Disconnect Time———μs

FOSC-based clock source

FRC-based clock source

* - These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. Does not apply for the ADCRC oscillator.
Figure 38-10. ADC Conversion Timing (ADC Clock FOSC-Based)
Figure 38-11. ADC Conversion Timing (ADC Clock from FRC)
Note:
  1. If the ADC clock source is selected as FRC, a time of TCY is added before the ADC clock starts. This allows the SLEEP instruction to be executed.