27.6.4 Interrupts

The FREQM has one interrupt source:

• DONE: A frequency measurement is done.

The interrupt flag in the Interrupt Flag Status and Clear (INTFLAG27.8.6 Interrupt Flag Status and Clear) register is set when the interrupt condition occurs. The interrupt can be enabled by writing a '1' to the corresponding bit in the Interrupt Enable Set (INTENSET27.8.5 Interrupt Enable Set) register, and disabled by writing a '1' to the corresponding bit in the Interrupt Enable Clear (INTENCLR27.8.4 Interrupt Enable Clear) register. The status of enabled interrupts can be read from either INTENSET or INTENCLR.

An interrupt request is generated when the interrupt flag is set and the corresponding interrupt is enabled. The interrupt request remains active until the interrupt flag is cleared, the interrupt is disabled, or the FREQM is reset. See INTFLAG27.8.6 Interrupt Flag Status and Clear for details on how to clear interrupt flags. All interrupt requests from the peripheral are ORed together on system level to generate one combined interrupt request to the NVIC. The user must read the INTFLAG27.8.6 Interrupt Flag Status and Clear register to determine which interrupt condition is present.

This interrupt is a synchronous wake-up source.

Note that interrupts must be globally enabled for interrupt requests to be generated.