18.1 Overview
This device provides several user writable configuration registers related to the configuration and operation of the system. The registers marked with (L) are loadable from Flash via their corresponding FBCFG* registers in the following table. The user must program these FBCFG* registers, which, then, loads the appropriate register after Reset.
This device provides a single user writable configuration register related to boot configuration of the device. The BCFG0 register provides control, selection and locking for various features of the device, including Flash BCFG7-0 valid, Flash Signature Bit (read only), Code Protect Status (read only). BCFG0 is a read-only register loaded from Flash register FBCFG0 in the following table.
| Register | Address | Destination |
|---|---|---|
| FBCFG0 | 0x0004_5F9C | BCFG0 (0x4400_0200) |
| FBCFG1/DEVCFG0 | 0x0004_5F98 | CFGCON0(L) (0x4400_0000) |
| FBCFG2/DEVCFG1 | 0x0004_5F94 | CFGCON1(L) (0x4400_0010) |
| FBCFG3/DEVCFG2 | 0x0004_5F90 | CFGCON2(L) (0x4400_0020) |
| FBCFG4/DEVCFG4 | 0x0004_5F8C | CFGCON4(L) (0x4400_0040) |
| FBCFG5/FUSERID | 0x0004_5F88 | USERID(L) (0x4400_00A0) |
- PPS register locking
- PMD register locking
- CFGPG register locking
- Config register locking
- JTAG port enable and configuration
- Trace port enable
- Flash ECC control
- Debug port and feature configuration CFGCON0 locking control
- Class B functionality enable
- Deadman timer enable and configuration
- Watchdog timer enable and configuration
- Clock monitoring and control
- Oscillator enable and configuration
- 2-Speed start-up enabled in the Sleep mode bit
- Deep sleep modules control
- SOSC configuration control
CFGPGQOS – The CFGPGQOS register defines the permission group settings for various bus hosts on the device bus matrix.
USER_ID(L) – The USER_ID register is used to provide the end user with a 16-bit ID field that may be read out directly through the JTAG interface via the USER_ID JTAG instruction.
BCFG0 – Used to set Code Protect, Sign Bit and control PCHE cache mode.