16.7 Register Description

Note: All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See CLR, SET, and INV Registers from Related Links.
Following conventions are used in the register description:
  • R = Readable bit
  • W = Writable bit
  • — = Unimplemented bit, read as ‘0’
  • -n = Value at POR
  • 1 = Bit is set
  • 0 = Bit is cleared
  • x = Bit is unknown
  • y = Values set from Configuration bits on POR
  • Reset values are shown in hexadecimal.