35.8.3 Interrupt Enable Clear

This register allows the user to disable an interrupt without doing a read-modify-write operation. Changes in this register will also be reflected in the Interrupt Enable Set (INTENSET) register.
Name: INTENCLR
Offset: 0x08
Reset: 0x00
Property: PAC Write-Protection

Bit 76543210 
        DATARDY 
Access R/W 
Reset 0 

Bit 0 – DATARDY Data Ready Interrupt Enable

Writing a '1' to this bit will clear the Data Ready Interrupt Enable bit, which disables the corresponding interrupt request.

ValueDescription
0 The DATARDY interrupt is disabled.
1 The DATARDY interrupt is enabled.