21.6.4 Interrupts

The RTC has the following interrupt sources:

  • Overflow (OVF): Indicates that the counter has reached its top value and wrapped to zero.
  • Tamper (TAMPER): Indicates detection of valid signal on a tamper input pin or tamper event input.
  • Compare (CMPn): Indicates a match between the counter value and the compare register.
  • Alarm (ALARMn): Indicates a match between the clock value and the alarm register.
  • Period n (PERn): The corresponding bit in the prescaler has toggled, see Periodic Intervals from Related Links.

Each interrupt source has an interrupt flag associated with it. The interrupt flag in the Interrupt Flag Status and Clear (INTFLAG) register is set when the interrupt condition occurs. Each interrupt can be individually enabled by setting the corresponding bit in the Interrupt Enable Set register (INTENSET=1), and disabled by setting the corresponding bit in the Interrupt Enable Clear register (INTENCLR=1). The status of enabled interrupts can be read from either INTENSET or INTENCLR.

An interrupt request is generated when the interrupt flag is raised and the corresponding interrupt is enabled. The interrupt request remains active until either the interrupt flag is cleared, the interrupt is disabled or the RTC is reset. See the description of the INTFLAG registers for details on how to clear interrupt flags.

All interrupt requests from the peripheral are ORed together on system level to generate one combined interrupt request to the NVIC, see Nested Vector Interrupt Controller (NVIC) from Related Links. The user must read the INTFLAG register to determine which interrupt condition is present.

Note: Interrupts must be globally enabled for interrupt requests to be generated, see Nested Vector Interrupt Controller (NVIC) from Related Links.