2 Capture Mode

Capture mode uses the 16-bit odd numbered timer resources (Timer1, Timer3, etc.). When an event occurs on the capture source, the 16-bit CCPRx register captures and stores the 16-bit value of the TMRx register. The valid events that can be detected when using the CCP module in Capture mode are defined in the following list and are configured using the MODE bits:

  • Every falling edge of CCPx input
  • Every rising edge of CCPx input
  • Every 4th rising edge of CCPx input
  • Every 16th rising edge of CCPx input
  • Every Edge of CCPx input (rising and falling)

When a capture is made, the CCP Interrupt Flag (CCPxIF) bit is set. The interrupt flag must be cleared in software. If another capture occurs before the value in the CCPRx register is read, the old captured value is overwritten by the new captured value. Figure 2-1 shows a simplified diagram of the capture operation.

Important: If an event occurs during a 2-byte read, the high and low-byte data will be from different events. It is recommended that, while reading the CCPRx register pair, to either disable the module or read the register pair twice for data integrity.

Figure 2-1. Capture Mode Operation Block Diagram