11.4 Parallel Master Port Access

Some devices contain a Parallel Master Port (PMP) peripheral which allows the connection of various memory and non-memory devices directly to the device. Access to the peripheral is controlled via a selection of peripherals. More information about this peripheral can be found in your device Family Reference Manual (FRM) or data sheet.

Note: PMP attributes are not supported on devices with EPMP. Use Extended Data Space (EDS) instead (see the 11.6 Extended Data Space Access section).

The peripheral can require a substantial amount of configuration, depending upon the type and brand of memory device that is connected. This configuration is not done automatically by the compiler.

The extensions presented here allow the definition of a variable as PMP. This means that the compiler will communicate with the PMP peripheral to access the variable.

To use this feature: