21.3.3.2 Output
If ASYNC in TCB.CTRLB is written to '0' ('1'), the output pin is driven synchronously (asynchronously) to the TCB clock. The bits CCMPINIT, CCMPEN, and CNTMODE in TCB.CTRLB control how the synchronous output is driven. The bits CCMPINIT, CCMPEN, and CNTMODE in TCB.CTRLB control how the synchronous output is driven. The different configurations and their impact on the output is listen in the table below.
CNTMODE | Output, CTRLB=’0’, CCMPEN=1 | Output, CTRLB=’1’, CCMPEN=1 |
---|---|---|
Single shot mode | Output high when counter starts and output low when counter stops | Output high when event arrives and output low when counter stops |
8-bit PWM mode | PWM mode output | PWM mode output |
Modes except single shot and PWM | Bit CCMPINIT in TCB.CTRLB | Bit CCMPINIT in TCB.CTRLB |