16.3.3 Interrupts

Table 16-3. Available Interrupt Vectors and Sources
Offset Name Vector Description Conditions
0x00 PORTx PORT A, B, C interrupt INTn in PORT.INTFLAGS is raised as configured by ISC bit in PORT.PINnCTRL.

Each PORT pin n can be configured as an interrupt source. Each interrupt can be individually enabled or disabled by writing to ISC in PORT.PINCTRL.

When an interrupt condition occurs, the corresponding Interrupt Flag is set in the Interrupt Flags register of the peripheral (peripheral.INTFLAGS).

An interrupt request is generated when the corresponding interrupt is enabled and the Interrupt Flag is set. The interrupt request remains active until the Interrupt Flag is cleared. See the peripheral's INTFLAGS register for details on how to clear Interrupt Flags.

Asynchronous Sensing Pin Properties

Table 16-4. Behavior Comparison of Fully/Partly Asynchronous Sense Pin
Property Synchronous or Partly Asynchronous Sense Support Full Asynchronous Sense Support
Minimum pulse width to trigger interrupt Minimum one system clock cycle Less than a system clock cycle
Waking the device from sleep From all interrupt sense configurations from sleep modes with Main Clock running. Only from BOTHEDGES or LEVEL interrupt sense configuration from sleep modes with Main Clock stopped. From all interrupt sense configurations from all sleep modes
Interrupt "dead time" No new interrupt for three cycles after the previous No limitation
Minimum Wakeup pulse length Value on pad must be kept until the system clock has restarted No limitation