20.3.3.6 Split Mode - Two 8-Bit Timer/Counters
Split Mode Overview
To double the number of timers and PWM channels in the TCA, a Split Mode is provided. In this Split Mode, the 16-bit timer/counter acts as two separate 8-bit timers, which each have three compare channels for PWM generation. The split mode will only work with single slope down count. Split Mode does not support Event action controlled operation.
Split Mode Differences to Normal Mode
- Count
- Down-count only
- Timer/Counter counter high and low byte are independent (TCA.LCNT, TCA.HCNT)
- Waveform generation
- Single Slope PWM only (WGMODE=SINGLESLOPE in TCA.CTRLB)
- Interrupt
- No change for low byte Timer/Counter (TCA.LCNT)
- Underflow interrupt for high byte Timer/Counter (TCA.HCNT)
- No compare interrupt or flag for High-byte Compare n registers (TCA.HCMPn)
- Event actions: Not compatible
- Buffer registers and Buffer Valid flags: Unused
- Register access: Byte access to all registers.
- Temp register: Unused, 16-bit register of the Normal Mode are accessed as 8-bit 'TCA_H' and 'TCA_L', respectively.
Block Diagram
Split Mode Initialization
When shifting between Normal Mode and Split Mode, the functionality of some registers and bits change, but their values do not. For this reason, disabling the peripheral (ENABLE=0 in TCA.CTRLA) and doing a Hard Reset (CMD=RESET in TCA.CTRLESET) is recommended when changing the mode to avoid unexpected behavior.
- Enable Split Mode by writing a '1' to the Split Mode Enable bit in the Control D register (SPLITM in TCA.CTRLD).
- Write a TOP value to the Period registers (TCA.PER)
- Enable the peripheral by
writing a '1' to the ENABLE bit in the Control A register (TCA.CTRLA).
The counter will start counting clock ticks according to the prescaler setting in the Clock Select bit field (CLKSEL) in TCA.CTRLA.
- The counter values can be read from the Counter bit field in the Counter registers (TCA.CNT).
Activating Split Mode results in changes to the functionality of some registers and register bits. The modifications are described in a separate register map. See Register Summary - Split Mode.