4.6 Implementation Details

The AVR EA device is configured to stay in Power-Down sleep mode whenever a measurement is not in progress to minimize power consumption. The Periodic Interrupt Timer (PIT), a part of the Real Time Counter (RTC), is set up to generate an interrupt each second to bring the device out of sleep mode. When this happens, a counter is incremented and checked against a predefined period (10s).

If the value matches this period, the DAC is enabled to produce an output voltage of 1.0V, and the ADC is enabled. The ADC is commanded to start a differential conversion immediately. While the ADC conversion is in progress, the CPU performs the calculations necessary for converting the previous ADC value into a voltage and a current. After the ADC conversion is complete, the DAC and ADC are disabled, and the device goes back into sleep mode.

In the example code, USART1 can be used to output the measured voltage and calculated current to a terminal. The "#define USART_ON" must be included to enable this.

When measuring small signals, the PGA may be enabled to amplify the input signal to get better resolution on the measurement. In this example, the PGA gain is set to 16x. The PGA bias is set to the maximum of 100%, because the highest bias allows the ADC sampling duration to be minimized (see device datasheet).

The following table shows the average current consumptions using different configurations (with VDD = 3.3V):

Main Clock PGA Disabled (ADC), Average Current PGA Enabled (ADC), Average Current (μA)
2 MHz 1.7 μA 1.6 μA
3.33 MHz 1.4 μA 1.3 μA
10 MHz 1.2 μA 1.1 μA

The average current consumption with the PGA enabled was lower than when the PGA was off, not following the theoretically expected result that using the PGA should result in higher current consumption. Testing showed that by not entering Sleep and sampling the ADC on each interrupt (each second) with the main clock at 10 MHz, the results were as expected:

PGA (ADC) Average Current Consumption
PGA OFF 3.48 mA
PGA ON 3.50 mA

This suggests that the higher average current consumption measured when PGA is off compared to when the PGA is enabled in the initial measurement is due to a combination of the time between each ADC measurement and the code execution order.