26.2.2 Signal Description

Table 26-1. Signals in Master and Slave Mode
SignalDescriptionPin Configuration
Master ModeSlave Mode
MOSIMaster Out Slave InUser defined(1)Input
MISOMaster In Slave OutInputUser defined(1,2)
SCKSerial ClockUser defined(1)Input
SSSlave SelectUser defined(1)Input
Note:
  1. If the pin data direction is configured as output, the pin level is controlled by the SPI.
  2. If the SPI is in Slave mode and the MISO pin data direction is configured as output, the SS pin controls the MISO pin output in the following way:
    • If the SS pin is driven low, the MISO pin is controlled by the SPI.
    • If the SS pin is driven high, the MISO pin is tri-stated.
When the SPI module is enabled, the pin data direction for the signals marked with “Input” in Table 26-1 is overridden.