12.5.3 Main Clock Status
All Status bits, except SOSC, will be available only if the respective
source is requested as the main clock or by a peripheral. If the oscillator RUNSTDBY
bit is set and the oscillator is unused/not requested, these bits will be
‘0
’.
Name: | MCLKSTATUS |
Offset: | 0x05 |
Reset: | 0x00 |
Property: | - |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PLLS | EXTS | XOSC32KS | OSC32KS | OSCHFS | SOSC | ||||
Access | R | R | R | R | R | R | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 5 – PLLS PLL Status
Value | Description |
---|---|
0 | PLL is not stable |
1 | PLL is stable |
Bit 4 – EXTS External Clock Status
Value | Description |
---|---|
0 | EXTCLK is not stable |
1 | EXTCLK is stable |
Bit 3 – XOSC32KS 32.768 kHz External Crystal Oscillator Status
Value | Description |
---|---|
0 | XOSC32K is not stable |
1 | XOSC32K is stable |
Bit 2 – OSC32KS 32.768 kHz Ultra Low-Power Internal Oscillator Status
Value | Description |
---|---|
0 | OSC32K is not stable |
1 | OSC32K is stable |
Bit 1 – OSCHFS Internal High-Frequency Oscillator Status
Value | Description |
---|---|
0 | OSCHF is not stable |
1 | OSCHF is stable |
Bit 0 – SOSC Main Clock Oscillator Changing
Value | Description |
---|---|
0 | The clock source for CLK_MAIN is not undergoing a switch |
1 | The clock source for CLK_MAIN is undergoing a switch and will change as soon as the new source is stable |