3.2.2.1 Connectors

The PIC32CXMTSH-DB board includes the following connectors:
  1. Neutral Connector (for an AC grid), J1.
    Table 3-1. Neutral Connector (for an AC grid), J1
    Pin Signal Name Description
    1 N Neutral (VN in PCB)
    2 N Neutral (VN in PCB)

  2. Line Voltage Connector (for an AC grid), J2.
    Table 3-2. Line Voltage Connector (for an AC grid), J2
    Pin Signal Name Description
    1 L1 Line 1 (V1 in PCB)
    2 L2 Line 2 (V2 in PCB)

  3. DC Input Connector, J3.
    Table 3-3. DC Input Connector, J3
    Pin Signal Name Description
    1 12V_IN DC Input voltage (+12V)
    2 GND Ground
    3

  4. Current Sensor Input 1 Connector (for Line 1 voltage), J10.
    Table 3-4. Current Sensor Input 1 Connector, J10
    Pin Signal Name Description
    1 IN1 Current channel 1, negative input
    2 IP1 Current channel 1, positive input

  5. Current Sensor Input 2 Connector (for Line 2 voltage), J11.
    Table 3-5. Current Sensor Input 2 Connector, J11
    Pin Signal Name Description
    1 IN2 Current channel 2, negative input
    2 IP2 Current channel 2, positive input

  6. Micro-B Female USB Connector, J12.
    Table 3-6. USB Device Connector, J12
    Pin Signal Name Description
    0 EARTH Shield
    1 VUSB 5V power
    2 D- Data Minus
    3 D+ Data Plus
    4 ID On the Go Identification
    5 GND_ISO Isolated Reference

  7. Isolated Pulse Outputs Connectors, J13 and J14.
    Table 3-7. Isolated Pulse Outputs Connector, J13
    Pin Signal Name Description
    1 CF1- Negative isolated pulse
    2 CF1+ Positive isolated pulse
    Table 3-8. Isolated Pulse Outputs Connector, J14
    Pin Signal Name Description
    1 CF2- Negative isolated pulse
    2 CF2+ Positive isolated pulse

  8. JTAG/SWD 10-pin Dual Row Connector for PIC32CXMTSH, J17.
    Table 3-9. SWD Connector, J17
    Pin Mnemonic Description
    1 VCC This is the target reference voltage. It is used to check if the target has power, to create the logic-level reference for the input comparators, and to control the output logic levels to the target. It is normally fed from VCC on the target board and must not have a series resistor
    2 SWDIO/TMS Serial Wire Input Output/Test Mode Select. JTAG mode set input of target CPU. This pin should be pulled up on the target. Output signal that sequences the target's JTAG state machine, sampled on the rising edge of the TCK signal
    3 GND Ground
    4 SWCLK/TCK Serial Wire Clock/Test Clock. JTAG clock signal to target CPU (output timing signal, for synchronizing test logic and control register access)
    5 GND Ground
    6 SWO/TDO Serial Wire Output / Test Asynchronous Data Out from target CPU
    7 KEY
    8 NC/TDI Not Connected/Test Data Input. JTAG data input of target CPU (serial data output line, sampled on the rising edge of the TCK signal). It is recommended that this pin is pulled to a defined state on the target board
    9 GND Detect Ground
    10 nRESET JTAG Reset (active-low output signal that resets the target). Output from the JTAG debug probe to the Reset signal on the target JTAG port. This pin is normally pulled HIGH on the target to avoid unintentional resets when there is no connection

  9. Xplained PRO Power Header, J19.
    Table 3-10. Xplained PRO Power Header, J19
    Pin Mnemonic Description
    1 GND Ground
    2 5V External 5V input (optional)
    3 3V3 Regulated 3.3V
    4 5V Regulated 5V

  10. Xplained PRO Extension Header, J20.
    Table 3-11. Xplained PRO Extension Header, J20
    Pin Mnemonic Description
    1 Test Point
    2 GND Reference Ground
    3 ADC+ Analog to digital converter, alternatively positive part of differential ADC
    4 ADC- Analog to digital converter, alternatively negative part of differential ADC
    5 GPIO1 General purpose I/O
    6 GPIO2 General purpose I/O
    7 PWM+ Pulse width modulation, alternatively positive part of differential PWM
    8 PWM- Pulse width modulation, alternatively negative part of differential PWM
    9 IRQ/GPIO Interrupt request line and/or general purpose I/O
    10 SS/GPIO Serial select for SPI and/or general purpose I/O
    11 TWD I2C Data
    12 TWCK I2C Clock
    13 RXD UART Receiver
    14 TXD UART Transmitter
    15 SS SPI Chip Select
    16 MOSI SPI Host Output Client Input
    17 MISO SPI Host Input Client Output
    18 SCK SPI Clock
    19 GND Reference Ground
    20 VCC 3.3V power for extension board

  11. mikroBUS add-on Board Connector, J21.
    Table 3-12. mikroBUS Connector, J21
    Pin Mnemonic Description
    1 AN Analog Input
    2 RST Reset
    3 CS SPI Chip Select
    4 SCK SPI Clock
    5 MISO SPI Host Input Client Output
    6 MOSI SPI Host Output Client Input
    7 +3V3 VCC: 3.3V power
    8 GND Reference Ground
    9 GND Reference Ground
    10 +5V VCC: 5V power
    11 SDA I2C Data
    12 SCL I2C Clock
    13 TX UART Transmit
    14 RX UART Receive
    15 INT Hardware Interrupt
    16 PWM PWM