5.8 I/O Characteristics for Ports PB0 to PB7 and PC0 to PC5

All parameters refer to GND (backplane) and are valid for T_amb = -40°C to +85°C, V_VS = 1.9-3.6V (3V application) and 2.4-5.5V (5V application) over all process tolerances, unless otherwise specified. Typical values are given at V_VS = 5V, T_amb = 25°C and for a typical process, unless otherwise specified. Crystal oscillator frequency f_XTO = 24.305 MHz. Standard Microchip EEPROM settings are used unless marked with ^*1.

Table 5-5. I/O Characteristics for Ports PB0 to PB7 and PC0 to PC5
No.	Parameters	Test Conditions	Pin	Symbol	Min.	Typ.	Max.	Unit	Type*
15.00	Input low voltage	PC0 to PC5 PB0 to PB7	14-19 22-29	V_IL	-0.3	—	0.2x V_VS	V	A
15.05	Input low leakage current I/O pin	PC0 to PC5 PB0 to PB7	14-19 22-29	I_IL	—	—	-1	µA	A
15.10	Input high voltage	PC0 to PC5 PB0 to PB7	14-19 22-29	V_IH	0.8x V_VS	—	V_VS+0.3	V	A
15.15	Input high leakage current I/O pin	PC0 to PC5 PB0 to PB7	14-19 22-29	I_IH	—	—	1	µA	A
15.20	Output low voltage	For 3V application I_OL = 0.2 mA	14-19 22-29	V_{OL_3V}	—	—	0.1x V_VS	V	A
15.20	Output low voltage	For 5V application I_OL = 0.8 mA	14-19 22-29	V_{OL_5V}	—	—	0.1x V_VS	V	A
15.30	Output high voltage	For 3V application I_OH = -0.2 mA	14-19 22-29	V_{OH_3V}	0.9xV_VS	—	—	V	A
15.30	Output high voltage	For 5V application I_OH = -0.8 mA	14-19 22-29	V_{OH_5V}	0.9xV_VS	—	—	V	A
15.40	I/O pin pull-up resistor	OFFMode – see port B and port C	14-19 22-29	R_PU	30	50	70	kW	A
15.50	Output low voltage for strong LED low-sided river (PB7)	Configurable on pin PB7 For 3V application I_LOAD = 1.5 mA	29	V_{OL_STR1}	—	—	0.1x V_VS	V	A
15.50	Output low voltage for strong LED low-sided river (PB7)	For 5V applicationI_LOAD = 5 mA. For more details, refer to the ATA8510/15 Industrial User's Guide (DS50003142).	29	V_{OL_STR1}	—	—	0.1x V_VS	V	A
15.60	Output high voltage for strong LED/LNA high- side driver (PB7, PB4)	Configurable on pin PB7 and PB4 For 3V application I_LOAD = -1.5 mA	26,29	V_{OH_STR1}	0.9x V_VS	—	—	V	A
15.60		For 5V application I_LOAD = -5 mA. For more details, refer to the ATA8510/15 Industrial User's Guide (DS50003142)	26,29	V_{OH_STR1}	0.9x V_VS	—	—	V	A
15.70	Output low voltage for strong ISP low-side driver (PB3)	Activated in ISP mode I_OL = 1.7 mA, V_Vs>2.5V T_amb = -40°C to +65°C	25	V_{OL_STR2}	—	—	0.1xV_VS 0.1x V_VS	V V	B B
15.80	Output high voltage for strong ISP high-side driver (PB3)	Activated in ISP mode I_OH = -1.7 mA, V_Vs >2.5V T_amb = -40°C to +65°C	25	V_{OH_STR2}	0.9xV_VS 0.9xV_VS	—	—	V V	B B
15.90	CLK_OUT output frequency	XTO, FRC or SRC related clock f_{CLK_OUT} = f_OSC/(2 * CLKOD)	22	f_{CLK_OUT}	—	—	4.5	MHz	B
16.00	CLK_OUT duty cycle	C_{LOAD_CLK_OUT} = 10 pF f_{CLK_OUT} = 4.5 MHz	22	DTY_{CLK_OUT}	45	—	55	%	A
16.10	I/O pin output delay time (rising edge)	For 3V application C_Load = 10 pF	14-19 22-29	T_{del_rise_3V}	13.6	17.5	22.4	ns	D
16.10	I/O pin output delay time (rising edge)	For 5V application C_Load = 10 pF	14-19 22-29	T_{del_rise_5V}	9.7	12.4	15.7	ns	D
16.20	I/O pin rise time (0.1×V_VS to 0.9×V_VS)	For 3V application C_Load = 10 pF	14-19 22-29	T_{rise_3V}	20.7	23.9	28.4	ns	D
16.20	I/O pin rise time (0.1×V_VS to 0.9×V_VS)	For 5V application C_Load = 10 pF	14-19 22-29	T_{rise_5V}	12.7	14.3	16.6	ns	D
16.30	I/O pin slew rate (rising edge)	For 3V application C_Load = 10 pF	14-19 22-29	T_{sr_rise_3V}	0.115	0.100	0.084	V/ns	D
16.30	I/O pin slew rate (rising edge)	For 5V application C_Load = 10 pF	14-19 22-29	T_{sr_rise_5V}	0.315	0.280	0.240	V/ns	D
16.40	I/O pin output delay time (falling edge)	For 3V application C_Load = 10 pF	14-19 22-29	T_{del_fall_3V}	13.7	17.4	22.7	ns	D
16.40	I/O pin output delay time (falling edge)	For 5V application C_Load = 10 pF	14-19 22-29	T_{del_fall_5V}	10.4	12.2	16.0	ns	D
16.50	I/O pin fall time (0.9×V_VS to 0.1×V_VS)	For 3V application C_Load = 10 pF	14-19 22-29	T_{fall_3V}	16.2	19.2	22.5	ns	D
16.50	I/O pin fall time (0.9×V_VS to 0.1×V_VS)	For 5V application C_Load = 10 pF	14-19 22-29	T_{fall_5V}	10.4	12.4	13.7	ns	D
16.60	I/O pin slew rate (falling edge)	For 3V application C_Load = 10 pF	14-19 22-29	T_{sr_fall_3V}	0.148	0.125	0.106	V/ns	D
16.60	I/O pin slew rate (falling edge)	For 5V application C_Load = 10 pF	14-19 22-29	T_{sr_fall_5V}	0.384	0.322	0.292	V/ns	D

Note: ^*1 Type means: A = 100% tested at voltage and temperature limits, B = 100 % correlation tested, C = Characterized on samples and D = Design parameter.

ATA8510/15

5.8 I/O Characteristics for Ports PB0 to PB7 and PC0 to PC5