5.1 Data corrupted when number of AXI outstanding transactions differs from 1

Limit to 1 the number of AXI outstanding transactions to access the AHB part in NICGPV. Performance of multichannel DMA transfers to the AHB part (SRAM, EBI, QSPI) is slightly impacted. Performance of transfers to the DDR memory is not affected. Apply the following settings:

NICGPV->NICGPV_AMIB[6].NICGPV_AMIB_FN_MOD = 0x3; 
NICGPV->NICGPV_AMIB[13].NICGPV_AMIB_FN_MOD = 0x3;