3.1.2.1.4 Functions

static void DIAG_InputPulseCapture (void)

The Clock Line Frequency Test implements the independent-time-slot-monitoring H.2.18.10.4 defined in the IEC60370 standard. .

diag_clock_line_status_t DIAG_ClockLineFreq (uint32_t sysclock, uint8_t linefreq, uint8_t tolerance)

The Clock Test Using Line Frequency implements the independent-time-slot-monitoring H.2.18.10.4 defined in the IEC60370 standard. It verifies the reliability of the system clock (i.e., the system clock should neither be too fast nor too slow). This test uses the AC line frequency to verify proper CPU clock operation. The AC line frequency is measured by using a zero-cross-detection circuit that is connected to the input of the Timer1 Gate Module.

void DIAG_Timer1GateCutomInterruptHandler (void)

This API is called from the Timer1 Gate ISR from where the API updates the period value of the reference line frequency signal. Based on whether the Timer overflow has occurred, it computes the period value. The pulse found flag is set in the ISR. This is entered only when the test status is test_in_progress. Once the 10 values are updated, the code will stop saving the value of the pulses and exit the ISR. This is done by limiting the pointer to TESTEND.