7.3 Ethernet PHY
The Microchip SAM9X60D1G-I/LZB embeds a single-supply 10BASE-T/100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over a standard CAT-5 Unshielded Twisted Pair (UTP) cable. The KSZ8081RNAIA is a highly-integrated PHY solution. The KSZ8081RNAIA offers the Reduced Media Independent Interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors. The KSZ8081RNAIA is available in 24-pin, lead-free QFN packages.
For more information about the Ethernet PHY KSZ8081, see Reference Documents.
| Power Rail | I/O Type | Primary | Alternate | PIO Peripheral | Reset State | Note | |||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| Signal | Type | Signal | Dir | Func | Signal | Dir | IO Set | Signal, Dir, PU, PD, HiZ, ST, SEC, FILTER | |||
| VDD_3V3 | GPIO | PB0 | I/O | WKUP5 | I | A | E0_RX0 | I | 1 | PIO, I, PU, ST | Used for RMII Interface |
| VDD_3V3 | GPIO | PB1 | I/O | – | – | A | E0_RX1 | I | 1 | PIO, I, PU, ST | |
| VDD_3V3 | GPIO | PB2 | I/O | – | – | A | E0_RXER | I | 1 | PIO, I, PU, ST | |
| VDD_3V3 | GPIO | PB3 | I/O | WKUP6 | I | A | E0_RXDV | I | 1 | PIO, I, PU, ST | |
| VDD_3V3 | GPIO | PB4 | I/O | – | – | A | E0_TXCK | O | 1 | PIO, I, PU, ST | |
| VDD_3V3 | GPIO | PB7 | I/O | AD8 | I | A | E0_TXEN | O | 1 | PIO, I, PU, ST | |
| VDD_3V3 | GPIO | PB9 | I/O | AD10 | I | A | E0_TX0 | O | 1 | PIO, I, PU, ST | |
| VDD_3V3 | GPIO | PB10 | I/O | AD11 | I | A | E0_TX1 | O | 1 | PIO, I, PU, ST | |
| VDD_3V3 | GPIO | PB5 | I/O | – | – | A | E0_MDIO | I/O | 1 | PIO, I, PU, ST | Used for MDIO Interface |
| VDD_3V3 | GPIO | PB6 | I/O | AD7 | I | A | E0_MDC | O | 1 | PIO, I, PU, ST | |
| VDD_3V3 | GPIO | PB8 | I/O | AD9 | I | – | PB8 | – | – | PIO, I, PU, ST | Interrupt Line |