9.6.3.4 Target Application Performs Reset (Cortex-M)

For Cortex-M based target CPUs if the target application contains some code that issues a reset (e.g., a watchdog reset), some special care needs to be taken regarding breakpoints. In general, a target reset will leave the debug logic of the CPU untouched meaning that breakpoints, etc., are left intact; however monitor mode gets disabled (bits in DEMCR get cleared.) J-Link automatically restores the monitor bits within a few microseconds after they have been detected as being cleared without explicitly being cleared by J-Link.

However, there is a small window in which it can happen that a breakpoint is hit before J-Link has restored the monitor bits. If this happens, instead of entering debug mode, a HardFault is triggered. To avoid this, a special version of the HardFault_Handler is needed which detects if the reason for the HardFault was a breakpoint and if so, just ignores it and resumes execution of the target application. A sample for such a HardFault handler can be downloaded from the SEGGER website, file: "Generic SEGGER HardFault handler".