7.2 Appendix B: PCMC Test Point Measurements

Figure 7-7. Test Points: PWM_HS, PWM_LS, C1INJ, V_OUT at V_IN = 9V, LOAD = 2A

Figure 7-8. Test Points: PWM_HS, C2INJ, DCR_CS, CT_CS at V_IN = 9V, LOAD = 2A

Figure 7-9. Test Points: V_OUT, SW_NODE, GATE_H, GATE_L at V_IN = 9V, LOAD = 2A

Figure 7-10. Test Points: COMP1, COMP2, HS_CS, DEBUG at V_IN = 9V, LOAD = 2A

Note: The debug test point signal is a software coded scheduler in the firmware.

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